外文翻譯--微型計(jì)算機(jī)的數(shù)字音頻接口processor-based數(shù)據(jù)記錄系統(tǒng)

1、<p>　　微型計(jì)算機(jī)的數(shù)字音頻接口PROCESSOR-BASED數(shù)據(jù)記錄系統(tǒng)</p><p>　　THOMAS L. CROXTON, STANLEY J. STUMP, AND WILLIAM McD. ARMSTRONG</p><p>　　ofPhysiology生物部門、印第安納大學(xué)學(xué)校ofMedicine、印第安納波利斯,印地安那州的46223</p>

2、<p><b>　　摘要：</b></p><p>　　提出了一種廉價(jià)的接口實(shí)現(xiàn)了數(shù)字化數(shù)據(jù)直接轉(zhuǎn)移,從數(shù)字音頻處理器和視頻盒式錄音機(jī)的基礎(chǔ)數(shù)據(jù)采集系統(tǒng)設(shè)計(jì)和Bezanilla(1985年。j .47:437 - 441)給一個(gè)IBM的PC / XT微型計(jì)算機(jī)。FORTRAN語(yǔ)言的可收回軟件驅(qū)動(dòng)接口很能干控制的錄音機(jī)和視頻數(shù)據(jù)采集后,立即開(kāi)始承認(rèn)的一個(gè)環(huán)節(jié)之前收集的數(shù)據(jù)。這使得分段

3、分析數(shù)據(jù)的長(zhǎng)的時(shí)間間隔,否則將超過(guò)記憶能力的微型計(jì)算機(jī)。</p><p>　　高容量的數(shù)據(jù)記錄系統(tǒng)所設(shè)計(jì)的F。Bezanilla(1985)是很有價(jià)值的從業(yè)人員記錄單通道,因?yàn)樗梢源鎯?chǔ)為二通道的非常精確的數(shù)據(jù)(16位分辨率)、采樣在一個(gè)流暢的速度增長(zhǎng)(44100個(gè)樣本/秒)、延長(zhǎng)一段時(shí)間(3 h).我們有,不過(guò),遇到限制電腦技術(shù)問(wèn)題進(jìn)行了分析這樣的數(shù)據(jù)記錄。尤其是當(dāng)數(shù)據(jù)播放時(shí)是很難精確或可以嗎選擇一個(gè)數(shù)值的數(shù)據(jù)

4、存儲(chǔ)在計(jì)算機(jī)記憶。這個(gè)困難促使我們開(kāi)發(fā)一個(gè)接口Bezanilla之間的數(shù)據(jù)記錄系統(tǒng)和PC / XT微型計(jì)算機(jī)模型(IBM儀器有限公司,IBM公司,Danbury,CT)。文中介紹了界面能夠獲取的數(shù)據(jù)重復(fù)同樣的間隔內(nèi)嗎和檢索連續(xù)間隔。后者能力允許單通道記錄分析有很大的影響在持續(xù)時(shí)間超過(guò)的數(shù)據(jù)存儲(chǔ)容量的電腦(< 6 s數(shù)據(jù)每512 k,寬帶下載1秒鐘的記憶)。</p><p>　　我們由一個(gè)開(kāi)關(guān)盒接口選擇左邊或

5、者右通道采樣、一個(gè)插件電腦板那multiplexes 16位數(shù)據(jù)轉(zhuǎn)移的8位元計(jì)算機(jī)數(shù)據(jù)總線,和一個(gè)匯編語(yǔ)言程序控制視頻錄音機(jī)(VCR)和指導(dǎo)在時(shí)序存放數(shù)據(jù)的內(nèi)存位置。兩功能模式是可得到的。在這個(gè)互動(dòng)的模式錄像機(jī)和數(shù)據(jù)數(shù)組開(kāi)始重復(fù),直到充滿了一個(gè)鍵被按下。錄像,然后當(dāng)場(chǎng)-20年代的位置開(kāi)始之前收集到的數(shù)據(jù)。在自動(dòng)模式調(diào)用程序提供了一個(gè)標(biāo)記42歲的順序,以前采樣數(shù)據(jù)點(diǎn)。VCR開(kāi)始時(shí),輸入的數(shù)據(jù)進(jìn)行了比較,結(jié)果表明該標(biāo)記物的一部分。如果找到匹

6、配的陣列的數(shù)據(jù)都被填滿立即與數(shù)據(jù)跟蹤標(biāo)記。充滿立即與數(shù)據(jù)跟蹤標(biāo)記。這然后當(dāng)場(chǎng)錄像-20年后,一個(gè)位置開(kāi)始的數(shù)據(jù)和控制返回到調(diào)用程序。如果沒(méi)有找到匹配的在一個(gè)可調(diào)的時(shí)期回放的(1分鐘0.5 h),錄影帶是當(dāng)場(chǎng)60年代和子程序返回一個(gè)國(guó)旗表示這些數(shù)據(jù)收集并不成功。如果最后的42數(shù)據(jù)每一個(gè)記錄點(diǎn)作為標(biāo)記為下一個(gè)記錄,序貫子功能調(diào)用在自動(dòng)模式將產(chǎn)量檢索的連續(xù)數(shù)據(jù)塊。</p><p>　　雖然我們是硬件接口描述特定對(duì)我們的

7、儀器和計(jì)算機(jī),適應(yīng)設(shè)備應(yīng)直截了當(dāng)。然而,速度8255接口芯片的限制,以防止出現(xiàn)利用這個(gè)特別的接口AT-type IBM電腦那操作的6 - 8兆赫的鐘速度。我們接口硬件中所示圖1?？偝杀倦娔X板和其它部件——150美元。這所設(shè)計(jì)的數(shù)字輸出階段Bezanilla提供的話時(shí)鐘左眼和右眼的數(shù)據(jù)通道和16個(gè)平行數(shù)據(jù)線路。在我們的數(shù)字音頻處理器(階級(jí)501;Unitrade公司、費(fèi)城、PA)這些信號(hào)是可得到的在一個(gè)25-pin連接器在后方的底盤(pán)。一個(gè)

8、帶狀電纜分機(jī)號(hào)是用來(lái)連接這些線條類似的接頭安裝在一邊,5”×2.5 " x 1.5”塑料盒。點(diǎn)對(duì)點(diǎn)的線路連接在盒子里一個(gè)37-pin數(shù)據(jù)線路接頭安裝在對(duì)面盒,連接到一個(gè)時(shí)鐘線渠道的選擇開(kāi)關(guān)、控制線路和線路從37-pin錄像機(jī)連接器連接到一個(gè)六角五接頭。第二個(gè)帶狀電纜連接37-pin延伸連接件的開(kāi)關(guān)盒的匹配連接器插件電腦板。</p><p>　　圖1的電子線路數(shù)字接口。并行數(shù)字輸出的數(shù)字音頻處理

9、器被A和B的港口8255可編程外圍接口芯片P1012計(jì)算機(jī)板上。8255年設(shè)定每一個(gè)16位數(shù)據(jù)轉(zhuǎn)換成詞兩個(gè)8字在電腦上轉(zhuǎn)移公共汽車。電線連接器,DB-25之間DC-37連接器在開(kāi)關(guān)盒便利數(shù)字音頻處理器連接到P1012計(jì)算機(jī)卡。選擇數(shù)字音頻處理器數(shù)據(jù)信道是由開(kāi)關(guān)選擇時(shí)鐘信號(hào)的輸入連接到8255端口的握手c成分添加到PI012卡激活玩,重新再來(lái),讓停止功能的視頻錄音機(jī)的控制下,通過(guò)optoisolators 6和7位港口C。</p&g

10、t;<p>　　MetraByte公司、Taunton,馬02780)修改允許由電腦控制錄放影機(jī)。該板包含一位8255可編程外圍接口芯片(英特爾公司、圣克拉拉、CA),一個(gè)數(shù)據(jù)總線緩沖區(qū),和一個(gè)地址譯碼器。未使用的區(qū)域在頂部的電路板提供充足的房間一根電線包裹集成電路哪幢房子的其它部件的插座中顯示圖1 .從添加組件連接現(xiàn)有板可以改變,以適應(yīng)焊接到短距離跳投電路一側(cè)的板。唯一的其他修改需要的是去除的電源電壓從針12、14、16

11、和18 37-pin連接的,所以這些線可以用于錄像機(jī)控制。5 V - 12 V,和+ 12 V線路,最好是不需要被中斷割下了3電路板靠近他們接觸痕跡計(jì)算機(jī)總線。切除+ 5 V遠(yuǎn)銷18的要求兩個(gè)邊路的切割痕跡頂部和方法37-pin底部連接組件的一面板和安裝一個(gè)跳投,把比分重新這些兩個(gè)+ 5 V痕跡。</p><p>　　這運(yùn)行,停止,后退、我們的錄像機(jī)功能(模型SL-HF450;索尼公司,美國(guó)長(zhǎng)島的城市,紐約通常是

12、由沮喪SPST觸發(fā)開(kāi)關(guān)位于前面板。修改這個(gè)錄像機(jī)僅含安裝了一個(gè)六角五連接器。背面板及連接桿地面和。沒(méi)有根植,雙方的運(yùn)行,停止,后退、開(kāi)關(guān)。這些線是相連的,通過(guò)開(kāi)關(guān)盒,到三個(gè)人4 N36 optoisolators安裝在P1012電路板。激活的optoisolators相當(dāng)于沉悶相應(yīng)的開(kāi)關(guān),錄放影機(jī)。</p><p>　　宏匯編源代碼圖2為控制界面。這個(gè)子程序可以對(duì)計(jì)劃8255年為數(shù)據(jù)傳輸、存儲(chǔ)數(shù)據(jù)微電腦記憶,和控

13、制視頻盒式錄音機(jī)。致電本程序指令,描述了它的算法給出了評(píng)論。</p><p>　　軟件驅(qū)動(dòng)數(shù)據(jù)傳輸正在寫(xiě)的宏匯編,是微軟打算聯(lián)系微軟FORTRAN調(diào)用程序。一個(gè)簡(jiǎn)要介紹了算法也緊隨其后。細(xì)節(jié)算法和指令致電本程序在備注中提供的源代碼列在圖2。8255年是程序?yàn)檩斎?接二連三的港口b .在這個(gè)配置中,0 - 5位用于港口C握手。單詞是搭成的數(shù)據(jù)端口A和B時(shí)鐘信號(hào)通過(guò)直接選擇比特2和4港口0 C點(diǎn)微機(jī)樣品港口C(INT

14、R B)當(dāng)數(shù)據(jù)來(lái)確定詞被抓住了。這然后輸入一個(gè)字,微機(jī)登記儲(chǔ)存在記憶中。記憶是寄款8每一個(gè)點(diǎn)(16個(gè)字節(jié))。每一個(gè)段落之間的部分增加和偏移登記注冊(cè)減少16歲。當(dāng)所需資料收集停止數(shù)量的段落的數(shù)據(jù)已經(jīng)存儲(chǔ)。檢測(cè)鍵盤(pán)條目是經(jīng)由函數(shù)調(diào)用磁盤(pán)的時(shí)間操作系統(tǒng)(DOS操作系統(tǒng))。</p><p>　　在自動(dòng)模式下,提供一個(gè)程序標(biāo)記組成的采樣點(diǎn)42之前。一個(gè)32位的模板是由第一個(gè)最低有效位32分的標(biāo)記。最重要的每一個(gè)采樣點(diǎn)的觀點(diǎn)

15、是旋轉(zhuǎn)成一個(gè)32位的一對(duì)寄存器和對(duì)比模板。這在比較了兩個(gè)階段。僅當(dāng)?shù)谝粋€(gè)16位比賽,其他的16位比較。因?yàn)?因?yàn)檎鎸?shí)的數(shù)據(jù),最低有效位基本上是隨機(jī)的,一個(gè)16位比賽時(shí)發(fā)生的頻率大約在216年一次每1.5秒。如果一個(gè)特定數(shù)目的一半比賽發(fā)生在總找到匹配的子程序中流產(chǎn)返回一個(gè)錯(cuò)誤代碼。如果一個(gè)總找到匹配的數(shù)據(jù)收藏是開(kāi)始。前兩個(gè)點(diǎn)(對(duì)應(yīng)這33rd和34th分漏掉標(biāo)記)。這未來(lái)的8點(diǎn)是:以一個(gè)數(shù)組的形式存儲(chǔ)在馬上preceeds陣列的數(shù)據(jù)在內(nèi)存中

16、。我們建議調(diào)用程序確認(rèn)這些8點(diǎn)都是相同的到最后的8分42-point標(biāo)記。 此后,點(diǎn)中存儲(chǔ)的數(shù)據(jù)的數(shù)組。完成的控制,通過(guò)使用錄像機(jī)的位元第六條、第七條的規(guī)定的港口C 8255。這些都是沒(méi)有要求握手,編程為輸出。7442BCD-to-Decimal轉(zhuǎn)換器是用來(lái)demultiplex這些兩位。代碼C6 C7 = 00,03,和10個(gè)激活玩,停止,收、功能,分別。位C6、C7通常設(shè)定,導(dǎo)致任何行動(dòng)。當(dāng)一方或兩位被復(fù)位,適當(dāng)?shù)妮敵龅?4<

17、/p><p>　　作者將很高興提供感興趣的讀者與磁盤(pán)拷貝的列在圖二子程序和它的組裝目標(biāo)代碼。有這樣要的的朋友在郵寄是請(qǐng)?jiān)卩]件里放上格式化好的軟盤(pán)。</p><p><b>　　參考:</b></p><p>　　Bezanilla,f . 1985。 一個(gè)高容量的數(shù)據(jù)記錄設(shè)備的基于數(shù)字音頻處理器和一個(gè)視頻盒式錄音機(jī)。雜志。J。47:437 - 44

18、1。</p><p>　　A MICROCOMPUTER INTERFACE FOR A DIGITAL AUDIO PROCESSOR-BASED DATA RECORDING SYSTEM</p><p>　　THOMAS L. CROXTON, STANLEY J. STUMP, AND WILLIAM McD. ARMSTRONG</p><p>　　Dep

19、artment ofPhysiology and Biophysics, Indiana University School ofMedicine, Indianapolis,</p><p>　　Indiana 46223</p><p>　　ABSTRACT An inexpensive interface is described that performs direct trans

20、fer of digitized data from the digital audioprocessor and video cassette recorder based data acquisition system designed by Bezanilla (1985, Biophys. J.,47:437-441) to an IBM PC/XT microcomputer. The FORTRAN callable sof

21、tware that drives this interface is capableof controlling the video cassette recorder and starting data collection immediately after recognition of a segment ofpreviously collected data. This permits piecewi</p>&

22、lt;p>　　The high capacity data recording system designed by F.Bezanilla (1985) is of great value to practitioners ofsingle-channel recording since it allows storage of two channels of very precise data (16 bit resoluti

23、on), sampled at an acceptably fast rate (44,100 samples/s), for extended periods of time (up to 3 h). We have, however, encountered technical problems which limit the computerized analysis of data recorded in this way. I

24、n particular, when the data are played back it is difficult to accurat</p><p>　　Our interface consists of a switch box that selects the left or right channel for sampling, a plug-in computer board that multi

25、plexes the 16-bit data for transfer on the 8-bit computer data bus, and an assembly language subroutine that controls the video cassette recorder (VCR) and directs storage of data in sequential memory locations. Two func

26、tional modes are available. In the interactive mode the VCR is started and the data array is filled repetitively until a key is pressed. The video tape i</p><p>　　Although the interface we describe is hardwa

27、re specific to our instruments and computer, adaptation to other equipment should be straightforward. However, speed limitations of the 8255 interface chip appear to preclude use of this particular interface with IBM AT-

28、type computers that operate at a 6-8 MHz clock speed. Our interface hardware is depicted in Fig. 1. Total cost for the computer board and additional components is -$150. The digital output stage designed by Bezanilla pro

29、vides word clock</p><p>　　FIGURE 1 Electronic circuitry of digital interface. The parallel digital output of the digital audio processor is routed to ports A and B of an 8255 programmable peripheral interfac

30、e chip on a P1012 computer board. The 8255 is programmed to convert each 16-bit data word to two 8-bit words for transfer on the computer bus. Wiring between a DB-25 connector and a DC-37 connector in the switch box faci

31、litates connection of the digital audio processor to the P1012 computer card. Choice of digital aud</p><p>　　The computer board we now employ (model PIO12,MetraByte Corp., Taunton, MA 02780) was modified to

32、allow computerized control of the VCR. This board contains an 8255 programmable peripheral interface chip (Intel Corp., Santa Clara, CA), a data bus buffer, and an address decoder. An unused area at the top of the circui

33、t board provides ample room for wire wrap integrated circuit sockets which house the additional components shown in Fig. 1. Connections from the added components to the existing boar</p><p>　　The play, stop,

34、 and rewind functions of our VCR (model SL-HF450; Sony Corp. of America, Long Island City,NY) are normally triggered by depressing SPST switches located on the front panel. Modification of this VCR consists simply of mou

35、nting a 5-pin hex connector to the back panel and connecting pins to ground and to the ungrounded sides of the play, stop, and rewind switches. These lines are connected, via the switch box, to three 4N36 optoisolators m

36、ounted on the P1012 circuit board. Activating</p><p>　　The software that drives the data transfer is written for the Microsoft MACRO ASSEMBLER and is intended to be linked with a Microsoft FORTRAN calling pr

37、ogram. A brief overview of the algorithm follows. Details of the algorithm and instructions for calling the subroutine are provided in the remarks of the source code listed in Fig. 2. The 8255 is programmed for strobed i

38、nput of ports A and B. In this configuration, bits 0-5 of port C are used for handshaking. The data word is latched into ports A</p><p>　　FIGURE 2 MACRO ASSEMBLER source code for control of interface. This s

39、ubroutine programs the 8255 for data transfer, stores data in microcomputer memory, and controls the video cassette recorder. Instructions for calling the subroutine and a description of its algorithm are given in the co

40、mments.</p><p>　　In the automatic mode the program is provided with a marker consisting of 42 previously sampled points. A 32-bit template is constructed from the least significantbits of the first 32 points

41、 of the marker. The least significant bit of each sampled point is rotated into a 32-bit pair of registers and is compared with the template. This comparison is done in two stages. Only if the first 16 bits match, are th

42、e other 16 bits compared. Since, for real data, the least significant bits are essentially</p><p>　　Control of the VCR is accomplished through use of bits 6 and 7 of port C of the 8255. These are not require

43、d for handshaking and are programmed for output. A 7442 BCD-to-Decimal converter is used to demultiplex these two bits. Codes C6 C7 = 00, 01, and 10 activate the play, stop, and rewind functions, respectively. Bits C6 an

44、d C7 are normally set, resulting in no action. When either or both bits are reset, the appropriate output of the 7442 is driven low, activating the corresponding 4N36 optois</p><p>　　The only defect we have

45、observed in testing this interface is occasional failure of the subroutine to detect the marker. This occurs <1% of the time. Often, a second subroutine call with the same marker will execute correctly. We believe thi

46、s failure to result from misreading of the video tape.</p><p>　　The authors will be pleased to provide interested readers with diskette copies of the subroutine listed in Fig. 2 and its assembled object code

47、. Such requests should include a formatted diskette in a stamped, self-addressed diskette mailer.</p><p>　　Received for publication 23 February 1987 and in final form 17 June1987.REFERENCE:Bezanilla, F. 1985