電工電子類外文翻譯---芯片stc12c5204ad的io口配置

1、<p>　　Chip STC12C5204AD I/O port configuration</p><p>　　STC12C5204AD series microcontroller its all I/O ports are controlled by the software configuration into 4 kinds of work type 4 types are respectiv

2、ely: quasi two-way mouth (standard the 8051 output mode), push-pull output, only for input (high resistance) or open-drain output functions. Every mouth consists of two control register the relevant position control each

3、 pin type of work. STC12C5204AD series microcontroller to electricity reattachment shall prevail two-way mouth (standard the 8051 outp</p><p>　　1. Quasi two-way mouth output configuration</p><p>

4、;　　Quasi two-way mouth output type can be used as output and input function but don't need to reconfigure mouth lines output state. This is because juncture lines output is 1 drive ability is very weak, allowing exte

5、rnal devices will its down. When pins for low, it output driving ability, can absorb the considerable current. Quasi two-way mouth have 3 pull_up transistor adapted to different needs.</p><p>　　In the three

6、and one transistor, pull up transistor called weak on pull ", for 1 and paternal line registers itself pins for 1 open. This pull_up provides basic drive current make prospective two-way mouth for 1 output. If a pin

7、 for 1 and output by external devices to drop down to low, pull up close and weak "very weak pull_up" maintain open position, in order to put this pin for low, strong to pull the external devices must have enou

8、gh power to make pin infused current threshold voltage of a vo</p><p>　　Article 2 pull_up transistors, called "extremely weak on pull", 1 latch paternal line when open. When pin, the very weak susp

9、ended the pull_up source generates very weak and current will pin and high level.</p><p>　　Article 3 pull_up transistor called "powerful pull". Juncture line latches from 0 to 1, the jumping to acc

10、elerate must pull up by logic 0 to two-way mouth logic 1 conversion. When this happened, powerful pull open about 2 machine cycle to make pins can quickly pull to the earth high level.</p><p>　　Quasi two-way

11、 mouth output shown below.</p><p>　　STC12C520 series microcontroller 3V device, if the user is in pins plus 5V voltage, there will be a current flow from pins, this has caused additional VDD power consumptio

12、n. Accordingly, the proposal is not in quasi two-way mouth mode 3V microcontroller pins to exert 5V voltage, such as the use of words, will add current limiting resistor, or using diode do input isolation, or use triode

13、do output segregation.</p><p>　　Quasi two-way mouth with a schmidt trigger input and a interference suppression circuit.</p><p>　　2. The push-pull output configuration</p><p>　　The

14、drop-down push-pull output configuration open-drain output and the structure and the prospective two-way mouth down same structure, but when latches is 1 provides continuous strong pull up. The push-pull model need more

15、commonly used for driving current situation.</p><p>　　The push-pull pins configuration are shown below.</p><p>　　3. Only for input (high resistance) configuration</p><p>　　Input por

16、t configuration are shown below.</p><p>　　Input port with a schmidt trigger input and a interference suppression circuit.</p><p>　　4. Open-drain output configuration</p><p>　　Junctu

17、re line latches is 0, the open-drain output close all pull_up transistors. When, as a logical output, this configuration mode must have externally pull, usually by resistance receiving V D D outside. This style of drop-d

18、own and quasi two-way mouth the same. The jammer line configuration are shown below.</p><p>　　Open-drain port with a schmidt trigger input and a interference suppression circuit.</p><p>　　A typi

19、cal transistor control circuit</p><p>　　If use weak pull_up control, suggestion plus pull-up resistors R1 (3.3 K ~ 10K), if not add pull-up resistors R 1 (3.3 K ~ 10K), suggest R2 value in the 15K above, or

20、use a strong push-pull output.</p><p>　　STC12C5204AD series microcontroller programmable counter array (PCA)</p><p>　　PCA contains a special 16 timer, has four 16 bits of capture/comparison of m

21、odule and connected. Each module programmable work</p><p>　　In four mode: increase/decrease along the capture, software timer, high-speed output or could be modulated pulse output. Modules connected to P3.7

22、(0 CEX0 / PCA0 / PWM0), module 1 connected to P3.5 (CEX1 / PCA1 / PWM1), modules connected to P2.0 (2 CEX2 / PCA2 / PWM2), modules connected to P2.4 (3 CEX3 / PCA3 / PWM3). Register the content of CH and CL is free of 16

23、 PCA increasing count the value of the timer. PCA timer is four modules, the public time benchmark by programming work .</p><p>　　Programmable Counter Array</p><p>　　PCA Timer/Counter</p>

24、<p>　　CMOD SFR there are 2 bytes and PCA related. They were: CIDL, idle mode allows stop PCA; ECF, buy a, enabling PCA interrupt, when PCA timer spillover will PCA counting overflow marks CCON SFR (CF) buy bits.<

25、;/p><p>　　CCON SFR contains PCA operating control bits (CR) and PCA timer mark (CF) and symbol of each module CCF3 / CCF2 (CCF0). CCF1 / / Through the software for a CR bits (CCON. 6) to run PCA. CR bit is rese

26、t when PCA closed. When PCA counter overflow, CF patients (CCON. 7) buy a, if CMOD register, it produces ECF position a disruption. CF bits can only through software cleared. CCON register a 0 ~ 3 is PCA modules logo (a

27、0 0, a corresponding module 1 corresponding module 1, bits 2 corresponding modul</p><p>　　PCA capture of patterning</p><p>　　If CCON SFR bits of the throne of CCFn and CCAPMn SFR ECCFn bit is se

28、t position, will produce the interruption.</p><p>　　A software timer mode</p><p>　　Through the CCAPMn registers for a ECOM and MAT bits, can make the PCA module used for software timer (below).

29、PCA timer values and module of the register compared to capture, when both values equal, if a CCON SFR in CCFn (in) and a ECCFn CCAPMn SFR) in all buy bits, will produce the interruption.</p><p>　　PCA Softwa

30、re Timer Mode/Software Timer model/PCA comparative Mode</p><p>　　PCA Software Timer Mode/Software Timer model/PCA comparative Mode</p><p>　　High-speed output model</p><p>　　This mod

31、el (below), when PCA counter plan of the numerical and module capture registers matching, PCA value CEXn output will happen module of the flip. To activate the high-speed output modes of CCAPMn TOG SFR, modules, MAT and

32、ECOM bit must buy bits.</p><p>　　PCA High - Speed, Output Mode/PCA high-speed Output Mode</p><p>　　In use PCA high-speed output mode special application note:</p><p>　　If a certain

33、PCA module working in high speed pulse output mode, want to use software output change the same group of other common I/O port state, need to do first, whether CCAPnH judge CH is equal to abide, can freely modify, if equ

34、al, and determine CCAPnL circumstances > CL is allowed to change the same group of other common I/O port state. If use P3.7 / PCA0 / PWM0 do PCA high-speed pulse output, and the program inside and with software output

35、 change when the state P3.4 mouth, you need to do </p><p>　　When one has the PCA high-speed pulse output function of I/O mouth working in high speed pulse output mode, if the software for the same group of o

36、ther I/O port operation, if meet PCA comparator matching, this operation can change the pulse output function with PCA high-speed mouth of the I/O.</p><p>　　PCA PWM mode/modulation pulse width output mode<

37、;/p><p>　　Since all share only PCA timer modules, all their output frequency is same. The output of each module 390v is independent of the changes, and using EPCnL, captured CCAPnL}} {of registers concerned. Wh

38、en CL SFR value is less than CCAPnL}} {EPCnL, when output is low, and the value of SFR when PCA CL is equal to or greater than EPCnL, CCAPnL}} {, the output as high. When the value of the CL by FF into EPCnH, 00 overflow

39、, CCAPnH}} {the contents of EPCnL, loaded into the CCAPnL}} {. In this way, can </p><p><b>　　譯文</b></p><p>　　芯片STC12C5204AD的I/O口配置</p><p>　　STC12C5204AD系列單片機(jī)其所有I/O口均可由軟件

40、配置成4 種工作類型4 種類型分別為：準(zhǔn)雙向口（標(biāo)準(zhǔn)8051輸出模式）、推挽輸出、僅為輸入（高阻）或開漏輸出功能。每個(gè)口由2個(gè)控制寄存器中的相應(yīng)位控制每個(gè)引腳工作類型。STC12C5204AD系列單片機(jī)上電復(fù)位后為準(zhǔn)雙向口（標(biāo)準(zhǔn)8051輸出模式）模式：2V 以上時(shí)為高電平，0.8V 以下時(shí)為低電平。</p><p>　　1.準(zhǔn)雙向口輸出配置</p><p>　　準(zhǔn)雙向口輸出類型可用作輸出和

41、輸入功能而不需重新配置口線輸出狀態(tài)。這是因?yàn)楫?dāng)口線輸出為1時(shí)驅(qū)動(dòng)能力很弱，允許外部裝置將其拉低。當(dāng)引腳輸出為低時(shí)，它的驅(qū)動(dòng)能力很強(qiáng)，可吸收相當(dāng)大的電流。準(zhǔn)雙向口有3個(gè)上拉晶體管適應(yīng)不同的需要。</p><p>　　在3個(gè)上拉晶體管中，有1個(gè)上拉晶體管稱為“弱上拉”，當(dāng)口線寄存器為1且引腳本身也為1時(shí)打開。此上拉提供基本驅(qū)動(dòng)電流使準(zhǔn)雙向口輸出為1。如果一個(gè)引腳輸出為1而由外部裝置下拉到低時(shí)，弱上拉關(guān)閉而“極弱上拉”

42、維持開狀態(tài)，為了把這個(gè)引腳強(qiáng)拉為低，外部裝置必須有足夠的灌電流能力使引腳上的電壓降到門檻電壓以下。</p><p>　　第2個(gè)上拉晶體管，稱為“極弱上拉”，當(dāng)口線鎖存為1 時(shí)打開。當(dāng)引腳懸空時(shí)，這個(gè)極弱的上拉源產(chǎn)生很弱的上拉電流將引腳上拉為高電平。</p><p>　　第3個(gè)上拉晶體管稱為“強(qiáng)上拉”。當(dāng)口線鎖存器由0到1跳變時(shí)，這個(gè)上拉用來加快準(zhǔn)雙向口由邏輯0到邏輯1轉(zhuǎn)換。當(dāng)發(fā)生這種情況時(shí)

43、，強(qiáng)上拉打開約2個(gè)機(jī)器周期以使引腳能夠迅速地上拉到高電平。</p><p>　　準(zhǔn)雙向口輸出如下圖所示。</p><p>　　STC12C520系列單片機(jī)為3V器件，如果用戶在引腳加上5V電壓，將會(huì)有電流從引腳流向VDD，這樣導(dǎo)致額外的功率消耗。因此，建議不要在準(zhǔn)雙向口模式中向3V 單片機(jī)引腳施加5V電壓,如使用的話，要加限流電阻，或用二極管做輸入隔離，或用三極管做輸出隔離。</p&

44、gt;<p>　　準(zhǔn)雙向口帶有一個(gè)施密特觸發(fā)輸入以及一個(gè)干擾抑制電路。</p><p><b>　　2 .推挽輸出配置</b></p><p>　　推挽輸出配置的下拉結(jié)構(gòu)與開漏輸出以及準(zhǔn)雙向口的下拉結(jié)構(gòu)相同，但當(dāng)鎖存器為1時(shí)提供持續(xù)的強(qiáng)上拉。推挽模式一般用于需要更大驅(qū)動(dòng)電流的情況。</p><p>　　推挽引腳配置如下圖所示。&l

45、t;/p><p>　　3 .僅為輸入（高阻）配置</p><p>　　輸入口配置如下圖所示。</p><p>　　輸入口帶有一個(gè)施密特觸發(fā)輸入以及一個(gè)干擾抑制電路。</p><p><b>　　4.開漏輸出配置</b></p><p>　　當(dāng)口線鎖存器為0時(shí)，開漏輸出關(guān)閉所有上拉晶體管。當(dāng)作為一個(gè)邏輯

46、輸出時(shí)，這種配置方式必須有外部上拉，一般通過電阻外接到V D D 。這種方式的下拉與準(zhǔn)雙向口相同。輸出口線配置如下圖所示。</p><p>　　開漏端口帶有一個(gè)施密特觸發(fā)輸入以及一個(gè)干擾抑制電路。</p><p>　　一種典型三極管控制電路</p><p>　　如果用弱上拉控制，建議加上拉電阻R1（3.3K～10K），如果不加上拉電阻R 1（3.3K～10K），建議

47、R2的值在15K以上，或用強(qiáng)推挽輸出。</p><p>　　STC12C5204AD系列單片機(jī)可編程計(jì)數(shù)器陣列（PCA）</p><p>　　PCA含有一個(gè)特殊的16位定時(shí)器，有4個(gè)16位的捕獲/比較模塊與之相連。每個(gè)模塊可編程工作。</p><p>　　在4 種模式下：上升/下降沿捕獲、軟件定時(shí)器、高速輸出或可調(diào)制脈沖輸出。模塊0連接到P3.7（CEX0/PCA0

48、/PWM0），模塊1連接到P3.5（CEX1/PCA1/PWM1），模塊2連接到P2.0（CEX2/PCA2/PWM2），模塊3連接到P2.4（CEX3/PCA3/PWM3）。寄存器CH和CL的內(nèi)容是正在自由遞增計(jì)數(shù)的16位PCA 定時(shí)器的值。PCA定時(shí)器是4個(gè)模塊的公共時(shí)間基準(zhǔn)，可通過編程工作在：1/12振蕩頻率、1/2振蕩頻率、定時(shí)器0溢出或ECI腳的輸入（P3.4）。定時(shí)器的計(jì)數(shù)源由CMOD SFR 的CPS1和CPS0位來確定（

49、見CMOD特殊功能寄存器說明）。</p><p><b>　　可編程計(jì)數(shù)器陣列</b></p><p>　　PCA定時(shí)器/計(jì)數(shù)器</p><p>　　CMOD SFR 還有2個(gè)位與PCA相關(guān)。它們分別是：CIDL，空閑模式下允許停止PCA；ECF，置位時(shí)，使能PCA中斷，當(dāng)PCA定時(shí)器溢出將PCA計(jì)數(shù)溢出標(biāo)志CF（CCON SFR）置位。<

50、;/p><p>　　CCON SFR包含PCA的運(yùn)行控制位（CR）和PCA定時(shí)器標(biāo)志（CF）以及各個(gè)模塊的標(biāo)志（CCF3/CCF2/CCF1/CCF0）。通過軟件置位CR 位（CCON.6）來運(yùn)行PCA。CR位被清零時(shí)PCA關(guān)閉。當(dāng)PCA計(jì)數(shù)器溢出時(shí)，CF位（CCON.7）置位, 如果CMOD寄存器的ECF位置位, 就產(chǎn)生中斷。CF位只可通過軟件清除。CCON 寄存器的位0～3是PCA各個(gè)模塊的標(biāo)志（位0對應(yīng)模塊0，

51、位1對應(yīng)模塊1,位2對應(yīng)模塊2,位3 對應(yīng)模塊3），當(dāng)發(fā)生匹配或比較時(shí)由硬件置位。這些標(biāo)志也只能通過軟件清除。所有模塊共用一個(gè)中斷向量。PCA的中斷系統(tǒng)如圖所示。</p><p>　　PCA的每個(gè)模塊都對應(yīng)一個(gè)特殊功能寄存器。它們分別是：模塊0對應(yīng)CCAPM0，模塊1對應(yīng)CCAPM1,模塊2對應(yīng)CCAPM2，模塊3對應(yīng)CCAPM3。特殊功能寄存器包含了相應(yīng)模塊的工作模式控制位。</p><p&

52、gt;　　當(dāng)模塊發(fā)生匹配或比較時(shí)，ECCFn位（CCAPMn.0，n＝0，1 ，2，3 由工作的模塊決定）使能CCON SFR的CCFn標(biāo)志來產(chǎn)生中斷。</p><p>　　PWM（CCAPMn.1）用來使能脈寬調(diào)制模式。</p><p>　　當(dāng)PCA計(jì)數(shù)值與模塊的捕獲/比較寄存器的值相匹配時(shí)，如果TOG位（CCAPMn.2）置位，模塊的CEXn 輸出將發(fā)生翻轉(zhuǎn)。</p>&

53、lt;p>　　當(dāng)PCA計(jì)數(shù)值與模塊的捕獲/比較寄存器的值相匹配時(shí)，如果匹配位MATn（CCAPMn.3）置位，CCON 寄存器的CCFn位將被置位。</p><p>　　CAPNn（CCAPMn.4）和CAPPn（CCAPMn.5）用來設(shè)置捕獲輸入的有效沿。CAPNn位使能下降沿有效，CAPPn位使能上升沿有效。如果兩位都置位，則兩種跳變沿都被使能，捕獲可在兩種跳變沿產(chǎn)生。</p><p

54、>　　通過置位CCAPMn寄存器的ECOMn位（CCAPMn.6）來使能比較器功能。</p><p>　　每個(gè)PCA模塊還對應(yīng)另外兩個(gè)寄存器，CCAPnH和CCAPnL。當(dāng)出現(xiàn)捕獲或比較時(shí)，它們用來保存16位的計(jì)數(shù)值。當(dāng)PCA模塊用在PWM模式中時(shí)，它們用來控制輸出的占空比。</p><p><b>　　PCA捕獲模式</b></p><p&

55、gt;　　要使一個(gè)PCA模塊工作在捕獲模式（下圖），寄存器CCAPMn的兩位（CAPNn 和CAPPn）或其中任何一位必須置1。對模塊的外部CEXn 輸入（CEX0/P3.7，CEX1/P3.5,CEX2/P2.0,CEX3/P2.4 口）的跳變進(jìn)行采樣。當(dāng)采樣到有效跳變時(shí)，PCA 硬件就將PCA計(jì)數(shù)器陣列寄存器（CH 和CL）的值裝載到模塊的捕獲寄存器中（CCAPnL 和CCAPnH）。</p><p>　　P

56、CA Capture Mode（PCA捕獲模式圖）</p><p>　　如果CCON SFR的位CCFn和CCAPMn SFR的位ECCFn位被置位，將產(chǎn)生中斷。</p><p><b>　　位軟件定時(shí)器模式</b></p><p>　　通過置位CCAPMn寄存器的ECOM和MAT位，可使PCA模塊用作軟件定時(shí)器（下圖）。PCA定時(shí)器的值與模塊

57、捕獲寄存器的值相比較，當(dāng)兩者相等時(shí)，如果位CCFn（在CCON SFR 中）和位ECCFn 在CCAPMn SFR中）都置位，將產(chǎn)生中斷。</p><p>　　PCA Software Timer Mode/ 軟件定時(shí)器模式/PCA 比較模式</p><p>　　PCA Software Timer Mode/軟件定時(shí)器模式/PCA比較模式</p><p><

58、b>　　高速輸出模式</b></p><p>　　該模式中（下圖），當(dāng)PCA計(jì)數(shù)器的計(jì)數(shù)值與模塊捕獲寄存器的值相匹配時(shí)，PCA模塊的CEXn輸出將發(fā)生翻轉(zhuǎn)。要激活高速輸出模式，模塊CCAPMn SFR 的TOG,MAT 和ECOM 位必須都置位。</p><p>　　PCA High-Speed Output Mode / PCA高速輸出模式</p><

59、;p>　　在使用PCA高速輸出模式時(shí)的特別應(yīng)用注意事項(xiàng):</p><p>　　如果某一PCA模塊工作在高速脈沖輸出模式,要用軟件輸出改變同一組其它普通I/O口的狀態(tài)，需先做判斷CH是否等于CCAPnH，若不等，可自由修改，若相等，再判斷CL>CCAPnL情況下才允許改變同一組其它普通I/O口的狀態(tài)。如用P3.7/PCA0/PWM0做PCA高速脈沖輸出，同時(shí)程序里面又要用軟件輸出改變P3.4口的狀態(tài)時(shí)，

60、就需要做判斷。</p><p>　　當(dāng)某個(gè)具有PCA高速脈沖輸出功能的I/O口工作在高速脈沖輸出模式時(shí)，如果軟件對同一組的其它I/O口進(jìn)行操作，如果遇上PCA比較器匹配時(shí),該操作有可能會(huì)改變此具有PCA高速脈沖輸出功能的I/O口的狀態(tài)，所以同一組的其它I/O口建議不要做輸出用，如果做輸出用時(shí)，要進(jìn)行判斷。</p><p><b>　　脈寬調(diào)節(jié)模式</b></p&

61、gt;<p>　　所有PCA模塊都可用作PWM輸出（下圖）。輸出頻率取決于PCA定時(shí)器的時(shí)鐘源。</p><p>　　PCA PWM mode /可調(diào)制脈沖寬度輸出模式</p><p>　　由于所有模塊共用僅有的PCA定時(shí)器，所有它們的輸出頻率相同。各個(gè)模塊的輸出占空比是獨(dú)立變化的，與使用的捕獲寄存器｛EPCnL，CCAPnL｝有關(guān)。當(dāng)CL SFR的值小于｛EPCnL，CCA