13.56mhz射頻識(shí)別芯片收發(fā)器模擬前端的研究

1、華中科技大學(xué)碩士學(xué)位論文13.56MHz射頻識(shí)別芯片收發(fā)器模擬前端的研究姓名：熊廷文申請(qǐng)學(xué)位級(jí)別：碩士專(zhuān)業(yè)：微電子學(xué)與固體電子學(xué)指導(dǎo)教師：張科峰20070601IIAbstract In recent years, broad applications of Radio Frequency Identification(RFID) have been found in areas of supplychain management, a

2、ccess contrl, public transportation, automatic manufacturing, etc. RFID system consists of two major components, an interrogator (reader) and a transponder (tag). RF front end transceiver is one of the most important par

3、ts in RFID system, including interrogator transceiver and transponder transceiver. A subsampling based quadrature demodulator is described, including carrier demodulation block, automatic gain amplifier(AGC), correlatio

4、n block , evaluation and digitizer block, to improve the performance. Multi-Direct-Conversion transmitters are designed to meet the requirements of different power transmission, including 100% ASK modulation and 10% ASK

5、modulation . RFID tags are often classified as passive ones and actives ones, according to the origin of power. The passive tag is energized by inducing the electromagnetic radio frequency wave transmitted by the reader

6、. How to make full use of the power is one of the key problems. A design of LDO voltage regulator for high frequency RFID tag IC is presented. Simulation results show that the typical dropout is 120mV and the typical qui

7、escent current is 20μA, and the regulator can be operable at input voltages 3.3V-7.5V. Furthermore, the modulation and demodulation circuits of the tag have been demonstrated, which fulfil the requirements of three kinds

8、 of present international standards. Finally, Simulation models and verification method have been brought forth. The design has been implemented with 0.35um CMOS technology by SMIC. The simulation results verify the feas