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1、華中科技大學(xué)碩士學(xué)位論文基于FFmpeg的H.264解碼器在Symbian上的移植和優(yōu)化姓名:李軍杰申請(qǐng)學(xué)位級(jí)別:碩士專業(yè):計(jì)算機(jī)技術(shù)指導(dǎo)教師:陳加忠2011-05-27華 中 科 技 大 學(xué) 碩 士 學(xué) 位 論 文 II Abstract With the issuance of 3G licenses, China's mobile communications industry has gone into the 3G e

2、ra. The biggest difference which the 3G brings is the increment in Internet speed and bandwidth. The mobile video business, which developed slowly due to the bandwidth limitations before, has been general concerned by co

3、nsumers and operators and became one of the main applications of 3G. Major carriers in China attach great importance to the development of mobile video services and put it into the first 3G (test) commercial business suc

4、cessively, such as China Telecom's mobile video, China Unicom's mobile TV, operators and content providers and device manufacturers expected to seek progress and breakthroughs in the mobile video services. As a n

5、ew generation video coding standard, H.264 does not only have a high compression ratio and good network compatibility, but also strengthened the capability of IP network, mobile network to deal with errors and packet los

6、s. It has a large market demand and development prospects. However, due to the codec and mobile platform limitations, H.264 video applications in mobile phones is relatively small. In the analysis of the characteristics

7、of streaming media technology and various features of video decoder, we focus on stripping the H.264 decoder of FFmpeg and the migration to Symbian S60 V3 system and further improvements and optimization. Through detaile

8、d analysis of the H.264 decoding process, to understand the various stages in the H.264 decoding process, firstly we deal with the whole process flow and structure of the decoder and do some optimization, followed by ana

9、lyzing and testing the execution time of each stage in the decoding process, do some optimization at the algorithm level, at the hardware level, we focus on the mechanism for memory access and Cache size, and CPU archite

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