2023年全國碩士研究生考試考研英語一試題真題(含答案詳解+作文范文)_第1頁
已閱讀1頁,還剩3頁未讀, 繼續(xù)免費(fèi)閱讀

下載本文檔

版權(quán)說明:本文檔由用戶提供并上傳,收益歸屬內(nèi)容提供方,若內(nèi)容存在侵權(quán),請進(jìn)行舉報(bào)或認(rèn)領(lǐng)

文檔簡介

1、FPGA-based Embedded System Design Fuming Sun1 Xiaoying Li2 Qin Wang1 Chunlin Tang3 1School of Information Engineering, University of Science and Technology, Beijing, China 2Cadence Beijing R&D Center 3College

2、 of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu, China Email: sunfuming_bj@163.com, lixy@cadence.com, wangqin@ies.ustb.edu.cn, tangchunlin@uestc.edu.cn Abstract—Since the la

3、test IC technology supports the integration of soft or hard CPU cores with dedicated logic on a single silicon chip, it leads FPGA into embedded system design and arouses the innovation of design methodology. In this

4、 paper, a general introduction of embedded system and the FPGA-based SOPC development are discussed. The FPGA- based embedded system can contain microprocessor IP cores and support embedded operating system. The mixed

5、design flow is illustrated and a data transmitting/receiving converter between serial port and network interface is taken as a design example. I. INTRODUCTION Embedded system often refers to the non-PC systems whic

6、h combines hardware and software design. In general, it consists of embedded micro-processor (8-bit, 16-bit, or 32- bit), storage and peripherals, embedded operating system (real-time and multi-task) and applications.

7、Embedded systems can be found everywhere – consumer electronics, home appliances, business equipments, automobiles, etc. The design is based on computer technology but focuses on specific application instead of gener

8、al processing as CPUs. Both its hardware and software are scalable and can be tailored for the requirement of functionality, reliability, cost, volume, and power consumption. Since the programmable logic has achieved

9、 a level of integration sufficient to incorporate the entire system or several systems into a single silicon chip, the trend towards system-on-a-programmable chip (SOPC) design is changing the evolvement of embedded

10、systems. The merge of field programmable gate array (FPGA) technology and embedded system design have great influence on the traditional design methodology. More concerns are put on hardware and software partitioning,

11、 co- design and co-verification, system integration, IP reuse, etc. In this paper, an overview of embedded system is introduced including its main features, embedded processors, and operating systems in Section 2. In S

12、ection 3, the hardware and software co-design flow and the FPGA-based embedded system design flow are illustrated. A data T/R converter example is given correspondingly. Finally, some discussions are proposed in the

13、Section 4. II. OVERVIEW OF EMBEDDED SYSTEMS A. Main Features of Embedded System Embedded systems have some common characteristics that distinguish from other computing systems [1]: ? Small system kernel. Most em

14、bedded systems have tight constraints on design metrics. System resources are relatively so limited that the system kernel is much smaller than the traditional operation systems (OS). For example, the size of OSE dis

15、tributing system from ENEA Corp. is only 5KB. ? Specific-functioned. Embedded systems are for specific applications. It does not require more complicated functionality beyond system specification. In contrast,

16、a desktop system executes a variety of programs for general processing. It is good for embedded systems to control both the cost and security of the system. ? Real-time operations. Many embedded systems must contin

17、ually react to changes in the system’s environment and must compute certain results in real time without delay. High performance real time operating system (RTOS) is a basic and important requirement of most embedded

18、 systems. B. Hardware and Software of Embedded Systems In terms of embedded hardware, its core component is the embedded microprocessor. At present, there are over 1,000 kinds of embedded processors in the world and th

19、e popular architectures are more than thirty, in which Intel MCS-8051 is ever the overwhelming majority. In recent years, small volume, high performance and low power consumption become dominant factors of embedded s

20、ystem design considerations. Professional intellectual property (IP) core providers like ARM, MIPS Corps. offer high-quality embedded cores to the semiconductor manufactures, by which all kinds of chips on different

21、devices applied to diverse areas are widely produced. 733 978-1-4244-2342-2/08/$25.00 ©2008 IEEE.high density and faster clock speed make FPGA well combined with the embedded system. A. Hardware/Software Co-

22、Design Flow The merge of embedded system and FPGA design changes the traditional design flow and emphasizes on the hardware/software co-design. As shown in Fig. 2, based on the system specification, designers can use

23、the finite state machine (FSM), or CSP to have an abstract description at the system level. How to partition the design into the functionality that is represented by the hardware and software is a key part of creatin

24、g an embedded system. The partitioning of HW/SW must consider the duality of hardware/software, how it imposes development costs, how it affects the flexibility and the risk of the system, whether it is easy to updat

25、e for the future trends [6]. After the design partitioning, module-level design is carried out by hardware synthesis (or silicon compilation), software compilation, and HW/SW interfacing. Then the synthesized & co

26、nfigured hardware modules and the parameterized software code should be integrated together. Currently, many stand-alone tools and design environments can co-operatively work on a seamless development platform. In ad

27、dition, HW/SW co- simulation and co-verification are also important and inevitable during the design flow for the evaluation of embedded system. Figure 2. HW/SW co-design flow. B. FPGA-based Embedded Design

28、Flow As shown in Fig. 3, the merge of embedded system design with FPGA technology also combines these two flows. The hardware design follows the standard FPGA design steps such as design entry, simulation, synthesis,

29、and implementation. The software design follows the basic embedded software stages from C code, C/C++ compilation to linker and debugger. Software debuggers, hardware debugging tools such as Xilinx’s Chipscope and Al

30、tera’s SignalTap are very useful to error-checking. Both the generated HW binary file for FPGA configuration and SW code written to flash memory are downloaded into the target board through JTAG. On the FPGA side, it

31、contains embedded processor, small storage, IPs, programmable logic and several interfaces. Figure 3. Design diagram of FPGA-based embedded system. C. Design Example In this sub-Section, a SoPC design example embedde

32、d with 32-bit Nios soft processor is implemented with a UART and Ethernet T/R converter. The application program is explored on the Microtronix’s μclinux operating system [7]. As shown in Fig. 4, the hardware framewo

33、rk is made up of one core SoPC chip (e.g. Altera Cyclone), two 512KB SRAM, 8MB Flash, UART voltage converter and Ethernet controller (LAN91C111). Figure 4. Frameword of UART-Ethernet T/R converter. Inside the FPGA

34、 chip, except the Nios soft processor, on- chip ROM, timers, interfaces of UART serial port, SRAM and Flash can all be configured as programmable logic. The interconnections between those components are illustrated in

35、 Fig. 5. Microprocessor and all the other modules are connected by the Avalon bus [8]. On-chip modules and Avalon bus module can be automatically generated by SoPC builder tool and other logic design can be finished i

溫馨提示

  • 1. 本站所有資源如無特殊說明,都需要本地電腦安裝OFFICE2007和PDF閱讀器。圖紙軟件為CAD,CAXA,PROE,UG,SolidWorks等.壓縮文件請下載最新的WinRAR軟件解壓。
  • 2. 本站的文檔不包含任何第三方提供的附件圖紙等,如果需要附件,請聯(lián)系上傳者。文件的所有權(quán)益歸上傳用戶所有。
  • 3. 本站RAR壓縮包中若帶圖紙,網(wǎng)頁內(nèi)容里面會有圖紙預(yù)覽,若沒有圖紙預(yù)覽就沒有圖紙。
  • 4. 未經(jīng)權(quán)益所有人同意不得將文件中的內(nèi)容挪作商業(yè)或盈利用途。
  • 5. 眾賞文庫僅提供信息存儲空間,僅對用戶上傳內(nèi)容的表現(xiàn)方式做保護(hù)處理,對用戶上傳分享的文檔內(nèi)容本身不做任何修改或編輯,并不能對任何下載內(nèi)容負(fù)責(zé)。
  • 6. 下載文件中如有侵權(quán)或不適當(dāng)內(nèi)容,請與我們聯(lián)系,我們立即糾正。
  • 7. 本站不保證下載資源的準(zhǔn)確性、安全性和完整性, 同時(shí)也不承擔(dān)用戶因使用這些下載資源對自己和他人造成任何形式的傷害或損失。

最新文檔

評論

0/150

提交評論