外文資料翻譯--基于c51兼容微處理器單片機(jī)的pwm控制器設(shè)計

1、<p>　　畢業(yè)設(shè)計(論文)外文資料翻譯</p><p>　　注：請將該封面與附件裝訂成冊。附件1：外文資料翻譯譯文</p><p>　　基于C51兼容微處理器單片機(jī)的PWM控制器設(shè)計</p><p><b>　　導(dǎo) 言</b></p><p>　　PWM技術(shù)，是一種電壓調(diào)節(jié)方法，通過控制具有固定電壓的直流電

2、源的開關(guān)頻率來調(diào)整兩端負(fù)荷電壓。這種技術(shù)能用于各種應(yīng)用包括電機(jī)、溫度、和壓力的控制，等等。在電機(jī)系統(tǒng)中的應(yīng)用，如圖1所示，通過調(diào)整電源開關(guān)的占空比，來控制電機(jī)的速度，如圖2所示，平均電壓通過改變占空比來控制電機(jī)的速度（在圖中D=t1/T）,這樣當(dāng)電機(jī)的電源打開時，它的速度加快，相反，當(dāng)電源關(guān)閉時，速度下降。</p><p>　　圖1 PWM控制框圖 圖2 電壓的電樞和占空比之間的關(guān)系&l

3、t;/p><p>　　所以，通過定期地調(diào)整時間的開通和關(guān)斷來控制電機(jī)的轉(zhuǎn)速：這兒有三種方法可以完成占空比的調(diào)整（1）通過脈寬來調(diào)整頻率；（2）通過同時調(diào)整頻率和脈寬；（3）通過頻率來調(diào)整脈寬。</p><p>　　一般情況下，有四中方法可以產(chǎn)生PWM信號，正如以下：（1）由獨(dú)立邏輯元件組成的裝置產(chǎn)生，這種是原始的方法，現(xiàn)在已被淘汰；（2）通過軟件產(chǎn)生，這種方法需要CPU持續(xù)操作代碼來控制I/O

4、口，以致于CPU不能做其他任何事。所以，這種方法也漸漸被淘汰；（3）通過ASIC產(chǎn)生，ASIC減少了CPU的負(fù)擔(dān)，并獲得了穩(wěn)定的工作，一般有幾個功能，如電流保護(hù)、死區(qū)時間調(diào)整等等；然而這種方法現(xiàn)在已被廣泛用于許多場合；（4）通過單片機(jī)的PWM功能模塊產(chǎn)生，只有當(dāng)需要改變占空比的時候CPU失控，這樣就不能產(chǎn)生PWM信號，否則通過在單片機(jī)里嵌入PWM功能模塊，并使這功能初始化，單片機(jī)的PWM口也能自動產(chǎn)生PWM信號。這種方法將在文章中講述。

5、</p><p>　　在本文中，我們建議在8051單片機(jī)里嵌入一個PWM模塊。該P(yáng)WM模塊，通過初始化控制寄存器和寄存器的占空比，可以支持PWM脈沖信號，用剛才提到的上述三種方法調(diào)整占空比和幾個操作模式，以增加用戶彈性。</p><p>　　以下這部分解釋PWM模塊和基本功能模塊的結(jié)構(gòu)。第三部分描述兩種操作模式。這部分還講述了實驗和仿真的結(jié)果驗證了合適的系統(tǒng)操作。通過操作模式，PWM模塊產(chǎn)

6、生一個或更多的脈寬模塊信號，它們的比率可以自主調(diào)整。</p><p>　　在單片機(jī)上執(zhí)行PWM模塊</p><p><b>　　PWM模塊的概述</b></p><p>　　PWM模塊如圖3所示，從圖中，可以很清楚得看到整個模塊有兩部分組成：PWM信號產(chǎn)生器和帶有頻道選擇邏輯的死區(qū)時間產(chǎn)生器。用戶可以通過執(zhí)行一些代碼使PWM模塊初始化，從而啟動

7、其功能。在特殊情況下，支持以下電源和運(yùn)動控制應(yīng)用：</p><p><b>　　1.直流電機(jī)</b></p><p><b>　　2.持續(xù)電源供應(yīng)</b></p><p>　　PWM模塊也有以下特征：</p><p>　　1.兩個PWM輸出信號以互補(bǔ)或獨(dú)立的方式運(yùn)行</p><p

8、>　　2.帶有互補(bǔ)模式的硬件死區(qū)電動機(jī)</p><p>　　3.占空比更新設(shè)置應(yīng)立刻或與PWM同步</p><p>　　圖3 PWM模塊的結(jié)構(gòu)</p><p><b>　　結(jié)構(gòu)的詳細(xì)組成</b></p><p><b>　　PWM電動機(jī)</b></p><p>　　二

9、輸出PWM電動機(jī)的結(jié)構(gòu)如圖2.1所示，該結(jié)構(gòu)是基于能產(chǎn)生脈寬調(diào)制信號上的16位計數(shù)器。該系統(tǒng)由四分頻或十二分頻的系統(tǒng)時鐘信號合成，時鐘信號的頻率可通過對在特殊寄存器PWMCON中的PWM0電機(jī)的T3M或PWM1電機(jī)的T4M的值進(jìn)行設(shè)置而調(diào)整，如圖4所示：對于PWM0電機(jī)，當(dāng)T3M設(shè)置為零時，16位計數(shù)器時鐘將被默認(rèn)預(yù)分為四分頻，當(dāng)T3M設(shè)置為1時，始終將被十二分頻；PWM同樣有這種功能。在PWMCON中的其它位的定義，詳見表1</

10、p><p>　　圖4 PWMCON的位的位置</p><p>　　表1：PWMCON的位的定義</p><p><b>　　通道選擇邏輯 </b></p><p>　　通道選擇邏輯在互補(bǔ)模式中很有用，如圖5所示。從表中可以清楚得看出，信號的CP和CPWM控制PWM1和PWML的來源，這兩個控制信號的詳細(xì)情況將在第三部分講述，

11、死區(qū)時間電機(jī)的結(jié)構(gòu)也將在一下部分的連續(xù)性互補(bǔ)模式中講述。</p><p>　　圖5 通道選擇邏輯表</p><p><b>　　運(yùn)行模式和仿真結(jié)果</b></p><p>　　這種設(shè)計有兩種運(yùn)行模式：獨(dú)立模式和互補(bǔ)模式。通過在PWMCON寄存器中設(shè)置相應(yīng)的位CPWM，如圖四所示，用戶可以選擇其中一個運(yùn)行模式。當(dāng)CPWM設(shè)置為0時，PWM模式將工

12、作在獨(dú)立模式，COWM設(shè)置為1時，將工作在互補(bǔ)模式。在這部分兩種模式將分別被詳細(xì)講述，從VCS EDA平臺的PWM模塊的仿真結(jié)果證明這種設(shè)計。</p><p><b>　　獨(dú)立PWM輸出模塊</b></p><p>　　獨(dú)立PWM輸出模塊對于驅(qū)動負(fù)荷很有用，如圖6所示。當(dāng)在PWMCON寄存器中相應(yīng)的CP位設(shè)置為0，特殊的PWM輸出模塊是在獨(dú)立的輸出模式里。在這種情況下

13、，PWM的兩種通道輸出是相互獨(dú)立的。在PWM0/PWML口的信號是從PWM0電機(jī)產(chǎn)生的。通道選擇邏輯完成單獨(dú)情況，如圖6所示。PWM I/O口通過默認(rèn)意見復(fù)位設(shè)置為獨(dú)立模式，但死區(qū)時間電機(jī)不能在獨(dú)立模式下工作。仿真結(jié)果如圖6所示。Tr4和Tr3分別與PWM0和PWM1相連，實際上，從圖看，單片機(jī)的P1[5]/P[4]口被用做PWMH/PWML或是一般的I/O口。</p><p>　　圖6 獨(dú)立模式下的PWM波形&

14、lt;/p><p><b>　　互補(bǔ)PWM輸出模式</b></p><p>　　互補(bǔ)輸出模式可以用于驅(qū)動逆變器負(fù)載，如圖7所示。這種逆變器拓?fù)鋵W(xué)是典型的直流裝置。在互補(bǔ)輸出模式，PWM的兩個輸出不能同時用。PWM通道和輸出口都是通過通道選擇邏輯內(nèi)部配置的，如圖7所示。死區(qū)時間是在兩端輸出的開關(guān)裝置沒有工作的短時期時可以選擇插入的。</p><p>

15、　　圖7 PWM互補(bǔ)輸出的典型電路</p><p>　　PWM I/O口通過在PWMCON中設(shè)置適當(dāng)?shù)腃PWM位選擇互補(bǔ)模式，在這種情況下，PSWL是有效果的。當(dāng)PSEL設(shè)置為0時，PWMH和PWML將來自PWM0電機(jī)，這時來自PWM1電機(jī)的信號是沒用的，而當(dāng)PSEL設(shè)置為1時，PWMH和PWML將來自PWM1電機(jī)，這時來自PWM0電機(jī)的信號是沒用的。在互補(bǔ)模式時產(chǎn)生PWM輸出信號的過程中，死區(qū)時間將被插入在以

16、下這部分講述。</p><p><b>　　死區(qū)時間控制</b></p><p>　　當(dāng)PWM I/O口在互補(bǔ)輸出模式運(yùn)行時，死區(qū)時間是自動啟用生成的，因為電源輸出裝置不能瞬間開關(guān)，在互補(bǔ)對模式下，一個PWM輸出的關(guān)閉與其它晶體管打開之間要一定的時間，2輸出的PWM模塊有一個帶有8位寄存器的可編程死區(qū)時間。 </p><p>　　PWM模塊的

17、互補(bǔ)輸出對已有一個用于產(chǎn)生死區(qū)時間插入的8位計數(shù)器。死區(qū)時間單元有一個上升沿和下降沿探測器，而這個探測器與PWM電機(jī)產(chǎn)生的PWM信號連接。當(dāng)?shù)竭_(dá)PWM邊沿時，死區(qū)時間被載入計時器，根據(jù)是否是上升沿或下降沿，在互補(bǔ)輸出端口上的其中一個過度被延遲，直到計數(shù)器降為0。PWM輸出對的死區(qū)時間表，如圖8a所示：</p><p>　　圖8a 死區(qū)時間單元模塊圖</p><p>　　圖8b 互補(bǔ)模式的P

18、WM輸出波形</p><p><b>　　總 結(jié)：</b></p><p>　　本文，我們設(shè)計了基于8位兼容8051單片機(jī)的PWM模塊，這種設(shè)計能產(chǎn)生2通道帶有兩種運(yùn)行模式的可編程周期PWM信號，即可插入死區(qū)時間的獨(dú)立模式和互補(bǔ)模式。這種在EDA平臺的仿真結(jié)果已證明了它的和諧性和有用性。</p><p>　　附件2：外文原文（復(fù)印件）<

19、/p><p>　　Design of PWM Controller in a MCS-51 Compatible MCU</p><p>　　Introduction</p><p>　　PWM technology is a kind of voltage regulation method by controlling the switch frequency of

20、 DC power with fixed voltage to modify the two-end voltage of load. This technology can be used for a variety of applications including motor control, temperature control and pressure control and so on. In the motor cont

21、rol system shown as Fig. 1, through adjusting the duty cycle of power switch, the speed of motor can be controlled. As shown in Fig. 2, under the control of PWM signal, the average of volt</p><p>　　Fig.1: Th

22、e Relationship between Voltage of Armature and Fig.2 Architecture of PWM Module</p><p>　　Therefore, the motor speed can be controlled with regularly adjusting the time of turn-on and turn-off. There

23、are three methods could achieve the adjustment of duty cycle: (1) Adjust frequency with fixed pulse-width. (2) Adjust both frequency and pulse-width. (3) Adjust pulse-width with fixed frequency. </p><p>　　Ge

24、nerally, there are four methods to generate the PWM signals as the following: (1) Generated by the device composed of separate logic components. This method is the original method which now has been discarded. (2) Genera

25、ted by software. This method need CPU to continuously operate instructions to control I/O pins for generating PWM output signals, so that CPU can not do anything other. Therefore, the method also has been discarded gradu

26、ally. (3) Generated by ASIC. The ASIC makes a decrease of </p><p>　　In this paper, we propose a PWM module embedded in a 8051 microcontroller. The PWM module can support PWM pulse signals by initializing the

27、 control register and duty-cycle register with three methods just mentioned above to adjust the duty cycle and several operation modes to add flexibility for user. </p><p>　　The following section explains th

28、e architecture of the PWM module and the architectures of basic functional blocks. Section3 describes two operation modes. Experimental and simulation results verifying proper system operation are also shown in that sect

29、ion. Depending on mode of operation, the PWM module creates one or more pulse-width modulated signals, whose duty ratios can be independently adjusted.</p><p>　　Implementation of PWM module in MCU</p>

30、<p>　　Overview of the PWM module</p><p>　　A block diagram of PWM module is shown in Fig.3. It is clearly from the diagram that the whole module is composed of two sections: PWM signal generator and dea

31、d-time generator with channel select logic. The PWM function can be started by the user through implementing some instructions for initializing the PWM module. In particular, the following power and motion control applic

32、ations are supported:</p><p>　　? DC Motor</p><p>　　? Uninterruptablel Power Supply (UPS)</p><p>　　·The PWM module also has the following features:</p><p>　　? Two P

33、WM signal outputs with complementary or independent operation</p><p>　　? Hardware dead-time generators for complementary mode</p><p>　　? Duty cycle updates are configurable to be immediated or s

34、ynchronized to the PWM</p><p>　　Fig.3 Architecture of PWM Module</p><p>　　Details of the architecture</p><p>　　PMW generator</p><p>　　The architecture of the 2-output P

35、WM generator shown in Fig.4 is based on a 16-bit resolution counter which creates a pulse-width modulated signal. The system is synthesized by a system clock signal whose frequency can be divided by 4 times or 12 times t

36、hrough setting the value of T3M for PWM0 or T4M for PWM1 in the special register PWMCON as shown in Fig.4. To PWM0 generator, the clock to 16-bit counter will be pre-divided by 4 times by default when T3M is set to zero.

37、 And the clock will be div</p><p>　　Fig .4 Bit Mapping of PWMCON</p><p>　　Table 1: The Bit Definition in PWMCON</p><p>　　Channel-select logic</p><p>　　The follow Fig.

38、5 shows the channel-select logic which is useful in Complementary Mode. From this diagram, it is clear to know that signal CP and CPWM control the source of PWMH and PWML. And the details about the two control signals wi

39、ll be discussed in the section 3, and the architecture of dead-time generator will also be discussed in section 5 for the continuity of Complementary Mode.</p><p>　　Fig. 5 Diagram of Channel-select Logic&l

40、t;/p><p>　　Operation Mode and Simulation Results</p><p>　　The design has two operation modes: Independent Mode and Complimentary Mode. By setting the corresponding bit CPWM in register PWMCON shown

41、 in Fig.6 user can select one of the two operation modes. When CPWM is set to zero, PWM module will work in Independent Mode, whereas, PWM module will work in Complimentary Mode. In the following of this section, the two

42、 operation mode will be explained respectively in detail and the simulation results of the PWM module from the Synoposys VCS EDA platform whi</p><p>　　Independent PWM Output Mode</p><p>　　An Ind

43、ependent PWM Output mode is useful for driving loads such as the one shown in Figure 6. A particular PWM output is in the Independent Output mode when the corresponding CP bit in the PWMCON register is set to zero.In thi

44、s case, two-channel PWM outputs are independent of each other. The signal on pin PWM0/PWMH is from PWM0 generator, and the signal on pin PWM1/PWML is from PWM0 generator. The separate case is achieved by the channel-sele

45、ct logic shown in Fig. 6. The PWM I/O pins are set to </p><p>　　Fig6 the Waveform of PWM Outputs in Independent Mode</p><p>　　Complementary PWM Output Mode</p><p>　　The Complementa

46、ry Output mode is used to drive inverter loads similar to the one shown in Figure 7. This inverter topology is typical for DC applications. In Complementary Output Mode, the pair of PWM outputs cannot be active simultane

47、ously. The PWM channel and output pin pair are internally configured through channel-select logic as shown in Figure7. A dead-time may be optionally inserted during device switching where both outputs are inactive for a

48、short period.</p><p>　　Fig 7 : Typical Load for Complementary PWM Outputs</p><p>　　The Complementary mode is selected for PWM I/O pin pair by setting the appropriate CPWM bit in PWMCON. In this

49、case, PSEL is in effect. PWMH and PWML will come from PWM0 generator when PSEL is set to zero, when the signals from PWM1 generator is useless, whereas PWMH and PWML will come from PWM1 generator when PSEL is set to 1, w

50、hen the signals from PWM0 generator is useless. In the process of producing the PWM outputs in Complementary Mode, the dead-time will be inserted to be discussed in the </p><p>　　Dead-time Control </p>

51、<p>　　Dead-time generation is automatically enabled when PWM I/O pin pair is operating in the Complementary Output mode. Because the power output devices cannot switch instantaneously, some amount of time must be

52、provided between the turn-off event of one PWM output in a complementary pair and the turn-on event of the other transistor. The 2-output PWM module has one programmable dead-time with 8-bit register.The complementary ou

53、tput pair for the PWM module has an 8-bit down counter that is used to pr</p><p>　　Fig 8a Dead-time Unit Block Diagram</p><p>　　Fig. 8b the Waveforms of PWM Outputs in Complementary Mode</p

54、><p>　　Conclusions</p><p>　　In this paper, we have designed PWM module based on an 8-bit MCU compatible with 8051 family. The design can generate 2-channel programmable periodic PWM signals with tw