h.264比特流解析器的設(shè)計(jì)

1、華中科技大學(xué)碩士學(xué)位論文H.264比特流解析器的設(shè)計(jì)姓名：馬良申請(qǐng)學(xué)位級(jí)別：碩士專業(yè)：軟件工程指導(dǎo)教師：鄒雪城20090525II ABSTRACT ISO/IEC Moving Picture Experts Group (MPEG) and ITU-T Video Coding Experts Group (VCEG) have jointly developed the latest video standard, H.264/A

2、VC for next generation multimedia coding applications. On one hand, compared with previous MPEG standards, H.264 provides over two times higher compression ratio with higher video coding quality. However, the computation

3、al complexity of H.264 video coding is much higher than those of the previous MPEG standards, which induces the necessity of achieving real-time processing of H.264 video coding through dedicated hardware designs. On the

4、 other hand, the demand for high-quality video coding on portable multimedia de-vices also motivates the design challenges of reducing the power consumption of the H.264 hardware designs. Therefore, the low-cost and low-

5、power hardware implementation for high-quality H.264 video encoding and decoding becomes an emerging trend in this research area. In order to achieve a power-efficient implementation of video decoding, designers must hav

6、e an insightful understanding of the characteristics of video data, coding algo-rithm, as well as general power-efficient design methodology. In this paper, we propose a low-power baseline bitstream parser of pure hardw

7、are structure, it can analyze the effi-ciency of input bitstream syntax elements and control the state transitions during decoding. Various power reduction techniques, such as circular bitstream buffer pointer move in-st

8、ruction register unit to replace the mechanism of addressing the actual data movement and data-driven based on statistic results, non-uniform partition, have been adopted in our sub-module design. Both of them can reduce

9、 power consumption very well. SystemVeri-log is a verification language for next generation. It provided a new methodology to im-prove the success rate of tape-out for complicated system design. In this paper, the design

10、 of the bitstream parser can achieve a comprehensive set of indicators after synthesis. The power-efficient and real-time features make our design ideal for low-power video transmission applications such as mobile phone