[雙語翻譯]---外文翻譯--級聯(lián)的buck-boost pfc變換器雙模式控制（原文）

1、2004 35rh Annual IEEE Power Elecrronics Specialists Conference Aachen. Germany, 2004 Dual-Mode Control of Cascade Buck-Boost PFC Converter K. Viswanathan, R. Oruganti, and D. Sriniva:jan Centre for Power Electronics,

2、Department of Electrical and Computer Engineering, National University of Singapore, Singapore-I 19260; engp0925@nus.edu.sg; eleramsh@nus.edu.sg; elesd@)nus.edu.sg; Abstract-This paper proposes a simple and effective

3、 control method for unity-power-factor rectifiers based on cascade buck-boost (CBB) converter. The proposed “dual- mode“ control method effectively exploits the additional degree of control freedom provided by the C B

4、 B converter and achieves sinusoidal input current while providing a tight output voltage regulation. In addition, the control method also de-couples the output voltage control loop from the often-slow input-current-

5、 reference generator, resulting in excellent output voltage dynamic response. The theoretical analysis, choice of circuit elements, and the applicable range of operating conditions of the proposed control scheme are

6、also presented in the paper. Excellent steady-state and transient performance of the converter are demonstrated through simulation and experimental results. A qualitative comparison of the converter performance

7、with the popular PFC converters has also been done. I. INTRODUCTION Single-phase power factor correction (PFC) using cascade buck-boost (CBB) converter [I], [2], [4] (Fig. 1) has a wide output voltage range. Unlike th

8、e popular boost- PFC converters, the CBB-PFC converter can even deliver an output voltage lower than the peak ac input voltage, if required. In addition, owing to the presence of two switches, CBB converter offers an

9、 additional degree of control- freedom that can be effectively exploited to achieve the often-contradictory multiple objectives of a single-phase PFC rectifier, namely drawing a sinusoidal input current, delivering a

10、 tightly regulated output voltage, and offering fast dynamic response. References [ I ] and [4] employ control schemes that switch the CBB converter operation between buck and boost modes based on the relative magnit

11、udes of the instantaneous input and output voltages. These schemes focus mainly on shaping the input current and do not fully exploit the control freedom (due to the presence of two switches) offered by the converter

12、. As a result, the output voltage contains second (line frequency) harmonic ripple and its dynamic response is slow. Reference [2] employs a sliding-mode based control scheme which does exploit the control freedom du

13、e to the presence of two switches. However, issues related to selection of inductor current reference in the control scheme, the magnitude of inductor current under various load and line conditions, and trade-off betw

14、een inductor size and converter efficiency have not been addressed in the paper. Reference [3] proposes an inverting two-switch buck-boost PFC converter and a control scheme that under ideal conditions meets the stea

15、dy-state objectives of the PFC converter. However, the paper does not present results demonstrating the dynamic behavior of the converterlcontrol scheme. Also, as the output voltage is not directly controlled, but co

16、ntrolled through the shaping of the inductor current, the presence of circuit parasitics which are not taken into account in shaping the inductor current may result in high output voltage ripple. Fig 1. Cascade buck-bo

17、osl- PFC (CBB-PFC) convener In this paper, a novel control method for the CBB converter when used in PFC applications is proposed. The proposed dual-mode control (DMC) method is a modified form of the indirect dual-m

18、ode control method discussed in reference [6] for a dc-dc tri-state boost converter [SI. The control method is simple to implement and meets the PFC objectives. The second harmonic component of input power is absorbe

19、d in the converter itself ([2], [3]) and is prevented from reaching the output terminals, resulting in low output voltage ripple. Unlike the method in [3], the proposed control method independently controls the output

20、 voltage and input current. The separation of output voltage control from the input current control makes fast dynamic response of the converter possible for limited range of load step changes. However, for large loa

21、d changes, the converter offers slow dynamics. This aspect will be demonstrated in the paper. The important disoussions in this paper include a brief review of CBB converter operated in tri-state mode, description of

22、 the proposed control scheme and its limitations, trade-off between inductor size and efficiency, and selection of inductor and output capacitor. The paper also verifies the anticipated good steady-state and transient

23、 performance through simulation and experimental results. A qualitative comparison of the converter performance with the popular single-phase PFC converters is also given. Section II describes the suitability of CBB c

24、onverter for PFC applications. Section 111 describes the proposed dual- mode control scheme for CBB-PFC and the control trade- offs. Section IV discusses the design of power and control components. Section V prese

25、nts simulation and experimental results demonstrating the steady-state and dynamic response characteristics of the converter. Section VI gives a qualitative comparison of DMC-based CBB-PFC with popular single-phase

26、 PFC rectifiers. Section VI1 concludes the paper. II.CBB- DEGREES OF CONTROL FREEDOM This section describes the CBB converter and its additional degree of control-freedom that help in meeting 0-7803-8399-0/04/$20.W 0

27、2004 IEEE. 2178 2004 35th Annual IEEE Power Electronics Specialists Conference Aocken. Germany, 2004 The above two equations assume that the control inputs D band D , are independent. Such an independence is possib

28、le only under the conditions when the inductor current is high enough so that Db(t)+D,(1)6 I . (7) Condition (7) is satisfied by the third (slow) loop that controls lk. This is done indirectly by adjusting the ac-c

29、ycle- averaged steady-state value of free-wheeling duty ratio (0;). The free-wheeling interval serves as a ‘reservoir’ of extra energy ([SI, [6]). The longer the free-wheeling interval, the higher the current / b (

30、refer Fig. 3), the larger the stored energy, and hence better is condition (7) met. The added advantage of having a higher D, is that for a step change in load, the converter offers good dynamic response as the exces

31、s energy in the inductor is readily released by a reduction in the free-wheeling interval, under transient conditions. However, for large load changes, the inductor may lose all its energy and the dynamics will be slo

32、w. This will be demonstrated later. C. Dual-Mode Control (DMC) Scheme: The proposed dual-mode control (DMC) scheme for the CBB-PFC rectifier is shown in Fig. 5 . As pointed out earlier, the scheme has three control

33、loops, namely I. A charge control [7] based input current (C<,) shaping loop that decides 4. As the input current is pulsed, to avoid ringing and oscillations in the sensor circuit, the inductor current is sensed

34、 and is integrated during the ‘DhT interval to get the input current. 7. A fast output voltage error loop that decides D, 3. A slow orerror loop that decides the peak value of rectifier current (l,ec,(,,k,*) to get t

35、he required inductor current lh satisfying (7). In the DMC scheme, Db has been selected as the ‘master’ control input with dependency only on the input current error. Do is the ‘slave’ control input with saturation a

36、t I-Dh. The reason for these choices can be explained as follows. Let us assume instead D , to be the master and Db to be the slave control input. When a load (increase) step OCCUTS, the output voltage dips. Do i

37、ncreases in an attempt to draw more energy from the inductor for maintaining the output voltage. As a result, D, is reduced at first followed by a reduction in Dh. With a reduced 4 , the energy input from the ac so

38、urce is brought down. This reduces the energy in the inductor and worsens the output voltage dip. The system will never be able to recover from such a transient as Do gets saturated. To avoid this D bis given the h

39、ighest priority, followed by D,, and then D/; D. DMC o fCBB-PFC- Trade-offs and Limitations: The trade-offs in the CBB-PFC converter will be explained with respect to the converter that was designed, simulated and b

40、uilt. The specifications of the converter are Y,=85-IIOV, 60 Hz, Y,=IOO V, and /o (rated)=l A. The component values chosen were L=13.6 mH, C470 pF, La.= 700 pH, and Gin= 0.94 pF. For the purpose of analysis, the e

41、ffect of line filter (Llm C,) is neglected in the sections to come and V, is assumed to be equal to V,(Fig. 5). The first trade-off in CBB-PFC exists between size of the inductor and operating efficiency of the conver

42、ter. In the proposed PFC scheme, the second harmonic energy is absorbed in the inductor. If the inductance is low, high losses (due to parasitic resistances) occur in the power converter due to high inductor current.

43、 High inductor current also results in high crest factor of the input current causing EM1 Droblem:;. A reduction in inductor current and Fig. 5. Dual-modeContral scheme for CBE-PFC rectifier crest factor of input curr

44、ent can be achieved by increasing the inductance value. However, this increases the size of the inductor. Increasing the inductor size can be expected to slow down the transient performance of the converter. The ch

45、oice of free-wheeling duty reference D ;introduces another trade-off betweeri steady-state efficiency and meeting the objectives of PFC rectifier. At an operatirig point, D ;decides the rms value of inductor curr

46、ent I*. Setting a high value of D ;in the control scheme results in a high inductor current and hence a large energy storage (refer Fig. 6). Although, this results in excellent steady-state and transient response,