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1、Validation and Testing of Design Hardening for Single Event Effects Using the 8051 MicrocontrollerAbstractWith the dearth of dedicated radiation hardened foundries, new and novel techniques are being developed for harden
2、ing designs using non-dedicated foundry services. In this paper, we will discuss the implications of validating these methods for the single event effects (SEE) in the space environment. Topics include the types of tests
3、 that are required and the design coverage (i.e., design libraries: do they need validating for each application?). Finally, an 8051 microcontroller core from NASA Institute of Advanced Microelectronics (IAμE) CMOS Ultra
4、 Low Power Radiation Tolerant (Culprit) design is evaluated for SEE mitigative techniques against two commercial 8051 devices. Index Terms Single Event Effects, Hardened-By-Design, microcontroller, radiation effects.I. I
5、NTRODUCTIONNASA constantly strives to provide the best capture of science while operating in a space radiation environment using a minimum of resources [1,2]. With a relatively limited selection of radiation-hardened mic
6、roelectronic devices that are often two or more generations of performance behind commercial state-of-the-art technologies, NASA’s performance of this task is quite challenging. One method of alleviating this is by the u
7、se of commercial foundry alternatives with no or minimally invasive design techniques for hardening. This is often called hardened-by-design (HBD).Building custom-type HBD devices using design libraries and automated des
8、ign tools may provide NASA the solution it needs to meet stringent science performance specifications in a timely, cost-effective, and reliable manner. However, one question still exists: traditional radiation-hardened d
9、evices have lot and/or wafer radiation qualification tests performed; what types of tests are required for HBD validation?II. TESTING HBD DEVICES CONSIDERATIONSIII. HBD TECHNOLOGY EVALUATION USING THE 8051 MICROCONTROLLE
10、RWith their increasing capabilities and lower power consumption, microcontrollers are increasingly being used in NASA and DOD system designs. There are existing NASA and DOD programs that are doing technology development
11、 to provide HBD. Microcontrollers are one such vehicle that is being investigated to quantify the radiation hardness improvement. Examples of these programs are the 8051 microcontroller being developed by Mission Researc
12、h Corporation (MRC) and the IAμE (the focus of this study). As these HBD technologies become available, validation of the technology, in the natural space radiation environment, for NASA’s use in spaceflight systems is r
13、equired.The 8051 microcontroller is an industry standard architecture that has broad acceptance, wide-ranging applications and development tools available. There are numerous commercial vendors that supply this controlle
14、r or have it integrated into some type of system-on-a-chip structure. Both MRC and IAμE chose this device to demonstrate two distinctly different technologies for hardening. The MRC example of this is to use temporal lat
15、ches that require specific timing to ensure that single event effects are minimized. The IAμE technology uses ultra low power, and layout and architecture HBD design rules to achieve their results. These are fundamentall
16、y different than the approach by Aeroflex-United Technologies Microelectronics Center (UTMC), the commercial vendor of a radiation– hardened 8051, that built their 8051 microcontroller using radiation hardened processes.
17、 This broad range of technology within one device structure makes the 8051an ideal vehicle for performing this technology evaluation.The objective of this work is the technology evaluation of the Culprit process [3] from
18、 IAμE. The process has been baselined against two other processes, the standard 8051 commercial device from Intel and a version using state-of-the-art processing from Dallas Semiconductor. By performing this side-by-side
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