外文翻譯--eda的發(fā)展及vhdl的應(yīng)用

1、<p><b>　　附錄A 英文文獻(xiàn)</b></p><p>　　The development of EDA and the application of VHDL</p><p>　　90's in 20 centuries, international last electronics and calculator technique mor

2、e the forerunner's nation, has been being actively investigating a new design method of the electronics electric circuit, and carried on an exhaustive change in the aspects of designing a method, tool wait, obtain hu

3、ge success.At the design realm of the electronics technique, the application of programmable logic spare part(like CPLD, FPGA), have already got extensive universality, these spare parts brought tremendo</p><p

4、>　　The EDA is an electronics design automation of abbreviation, design from the calculator assistance at the beginning of 90's in 20 centuries, calculator assistance manufacturing, calculator assistance test and c

5、alculator lend support to the concept of engineering a development since then.The EDA technique is to take calculator as tool, design at EDA software terrace up, use the hardware description language HDL completion a des

6、ign a document, then is of oneself completed logic to edit and transla</p><p>　　These spare parts can pass a software plait a distance but as to it's hardware structure and work the way carry on heavy Go

7、u and make thus the design of hardware can like software design so convenient fast.The all these biggest changed a traditional numerical method, design process of the system design and design idea and promoted the EDA te

8、chnical quick development.Make use of EDA tool, the electronics designer can start design electronics system from the concept, calculate way, agreement...etc</p><p>　　Use to the EDA concept or category very

9、breadth now.Include in each realm of the machine, electronics, correspondence, aviation aerospace, chemical engineering, mineral, living creature, medical science, military...etc., all there is EDA application.The EDA te

10、chnique has already extensively used in each archduke department, the Qi business unit and research teaching section currently.For example in the airplane the manufacturing the process, from design, performance test and

11、characteristic analy</p><p>　　The VHDL birth in 1982.At the end of 1987, the VHDL is confirm by IEEE and American Ministry of National Defense to describe language for the standard hardware.Announced VHDL st

12、andard edition from the IEEE, IEEE-1076(call 87 versions) after, the each EDA company released own VHDL design environment one after another, or declared that the own design tool can connect with VHDL.Henceforth the VHDL

13、 designed realm to get to extensively accept in the electronics, and gradually replaced an originally n</p><p>　　VHDL,Translating into chinese is soon extremely high the description language of the integrate

14、d circuit hardware.So it of the application mainly is an application in the design of numerical electric circuit.Currently, it is in the application most in china is the design which uses in the FPGA/CPLD/EPLD.Certainly

15、in some units with stronger real strenght, it is also use to design ASIC. </p><p>　　The VHDL mainly useds for the structure, behavior which describes numerical system, function with connect.In addition to i

16、mplying many languages sentence which have a hardware characteristic, VHDL languages forms and description style and sentence construction are very similar at general calculator deluxe language.VHDL procedure structure c

17、haracteristics is an engineering design, or call that the design entity(can be a component, an electric circuit mold piece or a system) is divided into exteri</p><p>　　The strong system hardware describes ab

18、ility.The VHDL has a multi-layer design description function, since can describe system class electric circuit, can describe door class electric circuit again.And description since can adopt a behavior description, depos

19、it a machine to deliver description or structure description, can also adopt the hybrid description of threes mixture.Moreover, VHDL support is inertial to delay and deliver to delay, can also accurately build up hardwar

20、e electric circuit mo</p><p>　　Be easy to a share and reply to use.The VHDL adoption can build up various mold piece that can again make use of according to the design method of database.These canned in adva

21、nce design or use to design a medium backup mold a piece before and depositted these to the database in, can be in laterly of the design carry on replying to use, can make the design result be design the personnel's

22、to carry on exchanges and share, decrease hardware electric circuit design. </p><p>　　compared with other hardware description languages, the VHDL have stronger behavior description ability, come to a decis

23、ion him to become a system design realm the best hardware a description language thus.The strong behavior description ability is to avert from concrete spare part structure and describe and design important assurance of

24、large-scale electronics system from the logic behavior. </p><p>　　the VHDL be abundant of imitate true language sentence and database function, make in any big system of the design can inspect a function po

25、ssibility of design the system in early days, can carry on imitating true emulation to the design at any time. </p><p>　　the ability and procedure structure of the behavior description with lexical VHDL com

26、e to a decision the decomposition that he has to support a large-scale design with have already have design of again make use of function.Meet the market demanding large-scale system efficiently, the completion of the hi

27、gh speed has to include many people the several generation hair set even together and abreast works and then can carry out. </p><p>　　for use the design of an assurance of VHDL completion, can make use of E

28、DA tool to carry on logic comprehensive with excellent turn, and auto of the VHDL describe the design change into the door class net form.</p><p>　　the description of VHDL to design have opposite and indepen

29、dent, the design can not understand the structure of hardware and need not manage the target spare part that the end design carry out, either is what, but carry on an independent design.</p><p>　　EDA的發(fā)展及VHDL

30、的應(yīng)用</p><p>　　20世紀(jì)90年代，國(guó)際上電子和計(jì)算機(jī)技術(shù)較先進(jìn)的國(guó)家，一直在積極探索新的電子電路設(shè)計(jì)方法，并在設(shè)計(jì)方法、工具等方面進(jìn)行了徹底的變革，而且取得了巨大成功。在電子技術(shù)設(shè)計(jì)領(lǐng)域，可編程邏輯器件（如CPLD、FPGA）的應(yīng)用，已得到廣泛的普及，這些器件為數(shù)字系統(tǒng)的設(shè)計(jì)帶來(lái)了極大的靈活性。這些器件可以通過軟件編程而對(duì)其硬件結(jié)構(gòu)和工作方式進(jìn)行重構(gòu)，從而使得硬件的設(shè)計(jì)可以如同軟件設(shè)計(jì)那樣方便快捷。這

31、一切極大地改變了傳統(tǒng)的數(shù)字系統(tǒng)設(shè)計(jì)方法、設(shè)計(jì)過程和設(shè)計(jì)觀念，促進(jìn)了EDA技術(shù)的迅速發(fā)展。</p><p>　　EDA是電子設(shè)計(jì)自動(dòng)化的縮寫，在20世紀(jì)90年代初從計(jì)算機(jī)輔助設(shè)計(jì)、計(jì)算機(jī)輔助制造、計(jì)算機(jī)輔助測(cè)試和計(jì)算機(jī)輔助工程的概念發(fā)展而來(lái)的。EDA技術(shù)就是以計(jì)算機(jī)為工具，設(shè)計(jì)者在EDA軟件平臺(tái)上，用硬件描述語(yǔ)言HDL完成設(shè)計(jì)文件，然后由計(jì)算機(jī)自動(dòng)地完成邏輯編譯、化簡(jiǎn)、分割、綜合、優(yōu)化、布局、布線和仿真，直至對(duì)于特

32、定目標(biāo)芯片的適配編譯、邏輯映射和編程下載等工作。EDA技術(shù)的出現(xiàn)，極大地提高了電路設(shè)計(jì)的效率和可操作性，減輕了設(shè)計(jì)者的勞動(dòng)強(qiáng)度。</p><p>　　利用EDA工具，電子設(shè)計(jì)師可以從概念、算法、協(xié)議等開始設(shè)計(jì)電子系統(tǒng)，大量工作可以通過計(jì)算機(jī)完成，并可以將電子產(chǎn)品從電路設(shè)計(jì)、性能分析到設(shè)計(jì)出IC版圖或PCB版圖的整個(gè)過程的計(jì)算機(jī)上自動(dòng)處理完成。</p><p>　　現(xiàn)在對(duì)EDA的概念或范疇用

33、得很寬。包括在機(jī)械、電子、通信、航空航天、化工、礦產(chǎn)、生物、醫(yī)學(xué)、軍事等各個(gè)領(lǐng)域，都有EDA的應(yīng)用。目前EDA技術(shù)已在各大公司、企事業(yè)單位和科研教學(xué)部門廣泛使用。例如在飛機(jī)制造過程中，從設(shè)計(jì)、性能測(cè)試及特性分析直到飛行模擬，都可能涉及到EDA技術(shù)。本文所指的EDA技術(shù)，主要針對(duì)電子電路設(shè)計(jì)、PCB設(shè)計(jì)和IC設(shè)計(jì)。EDA設(shè)計(jì)可分為系統(tǒng)級(jí)、電路級(jí)和物理實(shí)現(xiàn)級(jí)。EDA常用軟件、工具層出不窮，目前進(jìn)入我國(guó)并具有廣泛影響的EDA軟件有：multi

34、SIM7(原EWB的最新版本)、PSPICE、OrCAD、PCAD、Protel、Viewlogic、Mentor、Graphics、Synopsys、LSIIogic、Cadence、MicroSim，ISE，modelsim等等。這些工具都有較強(qiáng)的功能，一般可用于幾個(gè)方面，例如很多軟件都可以進(jìn)行電路設(shè)計(jì)與仿真，同進(jìn)還可以進(jìn)行PCB自動(dòng)布局布線，可輸出多種網(wǎng)表文件與第三方軟件接口。</p><p>　　VHDL

35、誕生于1982年,1987年底VHDL被IEEE和美國(guó)國(guó)防部確認(rèn)為標(biāo)準(zhǔn)硬件描述語(yǔ)言。自IEEE公布了VHDL的標(biāo)準(zhǔn)版本，各EDA公司相繼推出了自己的VHDL設(shè)計(jì)環(huán)境，或宣布自己的設(shè)計(jì)工具可以和VHDL接口。此后VHDL在電子設(shè)計(jì)領(lǐng)域得到了廣泛的接受，并逐步取代了原有的非標(biāo)準(zhǔn)的硬件描述語(yǔ)言。1993年，IEEE對(duì)VHDL進(jìn)行了修訂，從更高的抽象層次和系統(tǒng)描述能力上擴(kuò)展VHDL的內(nèi)容，公布了新版本的VHDL。現(xiàn)在，VHDL和Verilog作

36、為IEEE的工業(yè)標(biāo)準(zhǔn)硬件描述語(yǔ)言，又得到眾多EDA公司的支持，在電子工程領(lǐng)域，已成為事實(shí)上的通用硬件描述語(yǔ)言。有專家認(rèn)為，在新的世紀(jì)中，VHDL于Verilog語(yǔ)言將承擔(dān)起大部分的數(shù)字系統(tǒng)設(shè)計(jì)任務(wù)。</p><p>　　VHDL語(yǔ)言是一種用于電路設(shè)計(jì)的高級(jí)語(yǔ)言。它在80年代的后期出現(xiàn)。最初是由美國(guó)國(guó)防部開發(fā)出來(lái)供美軍用來(lái)提高設(shè)計(jì)的可靠性和縮減開發(fā)周期的一種使用范圍較小的設(shè)計(jì)語(yǔ)言 。</p><

37、p>　　VHDL翻譯成中文就是超高速集成電路硬件描述語(yǔ)言。因此它的應(yīng)用主要是應(yīng)用在數(shù)字電路的設(shè)計(jì)中。目前，它在中國(guó)的應(yīng)用多數(shù)是用在FPGA/CPLD/EPLD的設(shè)計(jì)中。當(dāng)然在一些實(shí)力較為雄厚的單位，它也被用來(lái)設(shè)計(jì)ASIC。</p><p>　　VHDL主要用于描述數(shù)字系統(tǒng)的結(jié)構(gòu)，功能和接口。除了含有許多具有硬件特征的語(yǔ)句外，VHDL的語(yǔ)言形式和描述風(fēng)格與句法是十分類似于一般的計(jì)算機(jī)高級(jí)語(yǔ)言。VHDL的程序結(jié)

38、構(gòu)特點(diǎn)是將一項(xiàng)工程設(shè)計(jì)，或稱設(shè)計(jì)實(shí)體（可以是一個(gè)元件，一個(gè)電路模塊或一個(gè)系統(tǒng)）分成外部（或稱可視部分,及端口)和內(nèi)部（或稱不可視部分），涉及到實(shí)體的內(nèi)部功能和算法完成部分。在對(duì)一個(gè)設(shè)計(jì)實(shí)體定義了外部界面后，一旦其內(nèi)部開發(fā)完成后，其他的設(shè)計(jì)就可以直接調(diào)用這個(gè)實(shí)體。這種將設(shè)計(jì)實(shí)體分成內(nèi)外部分的概念是VHDL系統(tǒng)設(shè)計(jì)的基本點(diǎn)。VHDL系統(tǒng)設(shè)計(jì)的基本點(diǎn)與其他硬件描述語(yǔ)言相比具有以下特點(diǎn)：功能強(qiáng)大、設(shè)計(jì)靈活。VHDL具有功能強(qiáng)大的語(yǔ)言結(jié)構(gòu)，可以用

39、簡(jiǎn)潔明確的源代碼來(lái)描述復(fù)雜的邏輯控制。它具有多層次的設(shè)計(jì)描述功能，層層細(xì)化，最后可直接生成電路級(jí)描述。VHDL支持同步電路、異步電路和隨機(jī)電路的設(shè)計(jì)，這是其他硬件描述語(yǔ)言雖不能比擬的。VHDL還支持各種設(shè)計(jì)方法，既支持自底向上的設(shè)計(jì)，又支持自頂向下的設(shè)計(jì)；既支持模塊化設(shè)計(jì)，又支持層次化設(shè)計(jì)。支持廣泛、易于修改。由于VHDL已經(jīng)成為IEEE標(biāo)準(zhǔn)所規(guī)范的硬件描述語(yǔ)言，目前大多數(shù)EDA工具幾乎都支</p><p>　　

40、強(qiáng)大的系統(tǒng)硬件描述能力。VHDL具有多層次的設(shè)計(jì)描述功能，既可以描述系統(tǒng)級(jí)電路，又可以描述門級(jí)電路。而描述既可以采用行為描述、寄存器傳輸描述或結(jié)構(gòu)描述，也可以采用三者混合的混合級(jí)描述。另外，VHDL支持慣性延遲和傳輸延遲，還可以準(zhǔn)確地建立硬件電路模型。VHDL支持預(yù)定義的和自定義的數(shù)據(jù)類型，給硬件描述帶來(lái)較大的自由度，使設(shè)計(jì)人員能夠方便地創(chuàng)建高層次的系統(tǒng)模型。</p><p>　　獨(dú)立于器件的設(shè)計(jì)、與工藝無(wú)關(guān)。設(shè)

41、計(jì)人員用VHDL進(jìn)行設(shè)計(jì)時(shí)，不需要首先考慮選擇完成設(shè)計(jì)的器件，就可以集中精力進(jìn)行設(shè)計(jì)的優(yōu)化。當(dāng)設(shè)計(jì)描述完成后，可以用多種不同的器件結(jié)構(gòu)來(lái)實(shí)現(xiàn)其功能。</p><p>　　很強(qiáng)的移植能力。VHDL是一種標(biāo)準(zhǔn)化的硬件描述語(yǔ)言，同一個(gè)設(shè)計(jì)描述可以被不同的工具所支持，使得設(shè)計(jì)描述的移植成為可能。</p><p>　　易于共享和復(fù)用。VHDL采用基于庫(kù)的設(shè)計(jì)方法，可以建立各種可再次利用的模塊。這些模

42、塊可以預(yù)先設(shè)計(jì)或使用以前設(shè)計(jì)中的存檔模塊，將這些模塊存放到庫(kù)中，就可以在以后的設(shè)計(jì)中進(jìn)行復(fù)用，可以使設(shè)計(jì)成果在設(shè)計(jì)人員之間進(jìn)行交流和共享，減少硬件電路設(shè)計(jì)。</p><p>　　（1）與其他的硬件描述語(yǔ)言相比，VHDL具有更強(qiáng)的行為描述能力，從而決定了他成為系統(tǒng)設(shè)計(jì)領(lǐng)域最佳的硬件描述語(yǔ)言。強(qiáng)大的行為描述能力是避開具體的器件結(jié)構(gòu)，從邏輯行為上描述和設(shè)計(jì)大規(guī)模電子系統(tǒng)的重要保證。</p><p&g

43、t;　?。?）VHDL豐富的仿真語(yǔ)句和庫(kù)函數(shù)，使得在任何大系統(tǒng)的設(shè)計(jì)早期就能查驗(yàn)設(shè)計(jì)系統(tǒng)的功能可行性，隨時(shí)可對(duì)設(shè)計(jì)進(jìn)行仿真模擬。</p><p>　?。?）VHDL語(yǔ)句的行為描述能力和程序結(jié)構(gòu)決定了他具有支持大規(guī)模設(shè)計(jì)的分解和已有設(shè)計(jì)的再利用功能。符合市場(chǎng)需求的大規(guī)模系統(tǒng)高效，高速的完成必須有多人甚至多個(gè)代發(fā)組共同并行工作才能實(shí)現(xiàn)。</p><p>　　（4）對(duì)于用VHDL完成的一個(gè)確定的